Junction Field-Effect Transistor (JFET)

Junction Field-Effect Transistor (JFET)

 The JFET is a three-terminal device with one terminal capable of controlling the current between the other two. In our discussion of the BJT transistor  the npn transistor was employed through the major part of the analysis and design sections, with a section devoted to the impact of using a pnp transistor. For the JFET transistor the n-channel device will appear as the prominent device, with paragraphs and sections devoted to the impact of using a p-channel JFET.

Junction Field-Effect Transistor are two types

1.  n-channel JFET

2.  p-channel JFET

n-channel JFET:

The basic construction of the n-channel 
JFET is shown in Fig. 4. Note that the
major part of the structure is then-type
material that forms the channel
 between the embedded layers of p-type

material.The top of the n-type channel is
connected through an ohmic contact to a 
terminal referred to as the  drain (D), while
 the lower end of then same material is 
connected through an ohmic contact to 
a terminal referred to as the source (S). 
The two p-type material are connected

together and to the gate (G) terminal. 

                                                                         

        In essence, therefore, the drain and source are connected to the ends of the n-type channel and the gate to the two layers of p-type material. In the absence of any applied potentials the JFET has two p-n junctions under no-bias conditions. The result is a depletion region at each junction as shown in Fig.5  that resembles the same region of a diode under no-bias conditions. Recall also that a depletion region is that region void of free carriers and therefore unable to support conduction through the region.

 

IDSS is the maximum drain current for a JFET and is defined by the condition VGS  =0 V and VDS |Vp|.










 Voltage-Controlled Resistor:

The region to the left of the pinch-off locus of Fig. 6 is referred to as the ohmic or voltage-controlled resistance region. In this region the JFET can actually be em-

ployed as a variable resistor (possibly for an automatic gain control system) whose

resistance is controlled by the applied gate-to-source voltage. the slope of each curve and therefore the resistance of the device between drain and source for VGS < Vp is a function of the applied voltage As VGS becomes more and more negative, the slope of each curve becomes more and more horizontal, corresponding with an increasing resistance level. The following equation will provide a good first approximation to the resistance level in terms of the applied voltage VGS.