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Lab report on inverter with transistor.

Saturday, February 18, 2012


Name of the experiment:


Design an inverter with transistor.
Objective:
Our main objective is to study how a transistor acts as inverters.
Theory:
The NOT circuit has a single input and a single output and performs the operation of LOGIC NEGATION in accordance with the following definition: “The output of a Not circuit takes on the 1 state if and only if the input does not take on the 1 state”.
The transistor circuit of Fig. 1 implements an inverter for positive logic having a 0 state of V(0) = VEE and a1 state of V(1) =VCC. If the inputs is low, Vi =V (0), then the parameters are chosen so that the Q is OFF and hence V0 = Vcc =V (1). On the other hand, if the input is high vi =V (1). Then the circuit parameters are picked so that Q is in saturation and then v0 =VEE =V (0), if we neglect the collector-to-emitter saturation voltage VCE(sat).
If input <0.75V (logic -o) [cutoff]
Then output = Vcc (logic -1)
And if input > 0.75 (logic -1) [saturation]
Then output = around (logic -0)

Required Equipment:
1.      Transistor (C828)
2.      Resistor (2.8KΩ)
3.      Trainer board
4.      Multimeter
5.      Connecting wire

Circuit Diagram:


Procedure:
1.      At first we connected the wire between components from the circuit diagram.
2.      Then we on the switch.
3.      Finally take the simulation result from the oscillator.

Experimental Data:
V­cc =5V & Rc = 2.2KΩ 
Table:
Input
Output
1
LOGIC 0
0
LOGIC 1

Result:
Transistor is acting like an inverter. So we can say that our experiment was successfully.
Discussion:
1.      All the connection should be tight.
2.      We connect the all component with carefully.
3.       Always connect ground 1st and then connect Vcc.

                                              



Fig: An inverter circuit
 


Lab report of diode OR gate


Name of the experiment: Study of diode OR gate.
Objective: To design an OR gate.
Theory: An OR gate is designed in Fig-01 using logic gates. If VA or VB or both VA and VB is at logic 1 then the diode is on and output is high. The output is taken using a LED. If both VA and VB are at logic 0 then both diodes are off and the output is at logic zero. If above situation is happened then the experiment will be verified.
Required instrument:
a)     Diode×2
b)     Resistor4.7kΩ×1
c)     LED×1
Circuit Diagram:

Fig-01: OR gate
Procedure:
a)     We connected the instrument very carefully according to the circuit diagram.
b)     We checked the output for various combinations of input voltages (00, 01, 10, 11)
c)     We took the data and put them on data table.




Data Table:
VA
VB
Output
0
0
Low (0)
0
1
High (1)
1
0
High (1)
1
1
High (1)

Result: The output is at logic zero only when both VA and VB. In other cases the output is at logic level high. So the circuit performs the operation of OR gate. Hence the experiment is verified.
Discussion: We connected the Circuit with proper precautionary.

Lab report of diode AND gate


Name of the experiment: Study of diode AND gate.
Objective: To design an AND gate.
Theory:  Figur-01 shows an AND gate. If VA or VB  both  are at logic 0 then diode D1 or  D2 or both D1&D2 is on respectively. If any one of  D1&D2 is on the Vcc goes to ground  through that, so the output will be Zero. If both VA and VB is high then D1&D2 is off and Vcc will be available at the output. i.e. The output is high. If above situation is happened then the experiment will be verified.
Required instrument:
a)     Diode×2
b)     Resistor(4.7kΩ×1)
c)     LED×1
Circuit Diagram:

Fig-01: AND gate
Procedure:
a)     We connected the instrument very carefully according to the circuit diagram.
b)     We checked the output for various combinations of input voltages (00, 01, 10, 11)
c)     We took the data and put them on data table.



Data Table:
VA
VB
Output
0
0
High (Logic level1)
0
1
Low (Logic level 0)
1
0
Low (Logic level 0)
1
1
Low (Logic level 0)

Result:
 The output is high only when both VA and VB is zero. In other cases the output is at logic level zero. So the circuit performs the operation of AND gate. Hence the experiment is verified.
Discussion: We connected the Circuit with proper precautionary.