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Lab report of diode AND gate

Saturday, February 18, 2012


Name of the experiment: Study of diode AND gate.
Objective: To design an AND gate.
Theory:  Figur-01 shows an AND gate. If VA or VB  both  are at logic 0 then diode D1 or  D2 or both D1&D2 is on respectively. If any one of  D1&D2 is on the Vcc goes to ground  through that, so the output will be Zero. If both VA and VB is high then D1&D2 is off and Vcc will be available at the output. i.e. The output is high. If above situation is happened then the experiment will be verified.
Required instrument:
a)     Diode×2
b)     Resistor(4.7kΩ×1)
c)     LED×1
Circuit Diagram:

Fig-01: AND gate
Procedure:
a)     We connected the instrument very carefully according to the circuit diagram.
b)     We checked the output for various combinations of input voltages (00, 01, 10, 11)
c)     We took the data and put them on data table.



Data Table:
VA
VB
Output
0
0
High (Logic level1)
0
1
Low (Logic level 0)
1
0
Low (Logic level 0)
1
1
Low (Logic level 0)

Result:
 The output is high only when both VA and VB is zero. In other cases the output is at logic level zero. So the circuit performs the operation of AND gate. Hence the experiment is verified.
Discussion: We connected the Circuit with proper precautionary.

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